1. Field of the Invention
The present invention relates to a reduction in the values of currents flowing through an electronic circuit device such as a semiconductor integrated circuit and a reduction in power consumption.
2. Description of the Related Art
With the development of portable apparatuses, it has been recently desired that semiconductor integrated circuits such as an LSI, etc. provide less power consumption for longer battery life. As effective means for realizing the less power consumption, the operating voltage may be lowered. It has been said in general that since power consumption is given by the product of the voltage and current, both the voltage and current can be reduced by lowering the operating voltage, whereby a synergistic effect results in a reduction in power consumption.
When the current value is reduced, power wiring is rendered easy and manufacturing costs are also reduced. It is however general that a source voltage used for the entire system using a semiconductor integrated circuit is constant and the source voltage used for the entire system is supplied to the semiconductor integrated circuit.
FIG. 5 is a circuit diagram showing a conventional configuration wherein two types of electronic circuit blocks are activated by a source voltage of 3.3 volts. In the drawing, reference numeral 1 indicates a power terminal, reference numeral 2 indicates a ground (GND) terminal, and reference numerals 3 and 4 indicate electronic circuit blocks such as semiconductor integrated circuits or the like electrically connected in parallel between the power terminal 1 and the ground terminal 2. Since loads on the electronic circuit blocks 3 and 4 vary in time sequence when the two electronic circuit blocks 3 and 4 are activated, the two electronic circuit blocks 3 and 4 cannot be put in use by simply series-connecting them between the source voltage and the ground. Therefore, it is known in general that the two electronic circuit blocks 3 and 4 are used by connecting them in parallel between the source voltage and the ground as shown in FIG. 5.
Assuming that the values of currents that flow through the electronic circuit blocks 3 and 4, are defined as I.sub.1 and I.sub.2 respectively as shown in FIG. 5, power W.sub.1 to be used by the entire electronic circuit blocks 3 and 4 is expressed in the following equation: EQU W.sub.1 =3.3.times.(I.sub.1 +I.sub.2) (1)
Thus, when the voltage applied to the system is constant, the achievement of the reduction in power consumption needs to reduce (I.sub.1 +I.sub.2).
The currents flowing through the respective electronic circuit blocks 3 and 4 can be reduced by providing voltage converters to activate the electronic circuit blocks 3 and 4 at low voltages and lowering voltages applied across the electronic circuit blocks 3 and 4. In such a case, however, power to be used by the voltage converters themselves is added together and each voltage converter needs a large area. It is therefore so difficult to incorporate them into a small chip such as a semiconductor integrated circuit.
Since the conventional electronic circuit device is constructed as described above, a problem arises in that it encounters difficulties in realizing the reduction in power consumption while holding its size and cost reductions.